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Thread: Xeon E5 performance charts |
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Thread Status: Active Total posts in this thread: 45
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Former Member
Cruncher Joined: May 22, 2018 Post Count: 0 Status: Offline |
Seeing for instance Fam.6, Ext.2A, Rev. D2 on a 2670QM, is this the same as the 'revision' indicator in CPU-Z?
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Former Member
Cruncher Joined: May 22, 2018 Post Count: 0 Status: Offline |
Once again, thank you. Now I understand the structure and how the process moves, step by step, closer to production.
"Don't expect here any general rules" I'll ask this anyway. OldChap seems to draw the line at B1. Would you agree? Is QS unnecessary, and therefore too expensive, for dedicated crunchers? All his pre-QS processors function well here on WCG, so QS maybe mostly improves on things that don't affect fixed frequency, 24/7 computers? |
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Mumak
Senior Cruncher Joined: Dec 7, 2012 Post Count: 477 Status: Offline Project Badges: 
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Seeing for instance Fam.6, Ext.2A, Rev. D2 on a 2670QM, is this the same as the 'revision' indicator in CPU-Z? In that case, yes, that's the value, but I think this needs explanation how reporting of this works. Without going into deeper details, any software can read only a CPU ID number from the CPU. This consists of Family number, Model number and Stepping number. Family and Model have additional extension fields. So you get a 32-bit number only and each software needs to know where a given family/model/etc belongs to. The same applies to stepping - the tool needs to know for example that for Sandy Bridge-EP stepping number '7' can belong to either M1 or C2. I can't speak for CPU-Z since I don't know how accurate its database is, but generally the 'revision' displayed there is the result of translation of CPU ID number into the stepping indicator. But this might not always be accurate depending on how well it knows about each stepping. In HWiNFO I use several methods to determine the CPU model and stepping including matching with a large database and additional parameters. Some time ago an Intel engineer contacted me, because he made a bet with other colleagues that he will take a certain CPU and fool HWiNFO to make it report as a different model. But he struggled with that and so asked me how the heck he can fool it. I told him it's not possible, so he failed :D  [Edit 1 times, last edit by Mumak at Mar 13, 2015 10:38:01 AM] |
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Mumak
Senior Cruncher Joined: Dec 7, 2012 Post Count: 477 Status: Offline Project Badges:
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I'll ask this anyway. OldChap seems to draw the line at B1. Would you agree? Is QS unnecessary, and therefore too expensive, for dedicated crunchers? All his pre-QS processors function well here on WCG, so QS maybe mostly improves on things that don't affect fixed frequency, 24/7 computers? I won't give you an exact recommendation and I already gave you some facts about that B1. If it runs well for OldChap, you can take the risk if it's worth for you. But remember that besides those erratas and limitations, the CPU is also not supported further (i.e. there are no further Microcode Updates available for it since it's not a QS/production recognized part). So for example if Intel later released a fix in Microcode, you won't be able to utilize it. Such parts get only updates for the ES stage process and further updates apply to QS/production parts only. |
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Former Member
Cruncher Joined: May 22, 2018 Post Count: 0 Status: Offline |
Yes, it's me again with the 20 questions.
Can a by Intel released and unimplemented microcode fix in a pre-QS processor cause it to stop working in a DC? About those erratas and limitations. "For this model, I see there are ~45 erratas fixed between B1 (ES2) and Cx/Mx (QS) steppings ! There are also some limitations to functionality in ES2." Where do you see this and is it possible to see the separate limitations and erratas? |
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