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David Autumns
Ace Cruncher UK Joined: Nov 16, 2004 Post Count: 11062 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
http://www.theregister.co.uk/2010/06/14/seamicro_sm10000_server/
----------------------------------------2.8 Years a day ! That has to beat my 134.5 Floating Point MIPS per Watt at the socket. I thought I was doing nicely with 6 Cores a box ![]() ![]() [Edit 1 times, last edit by David Autumns at Dec 12, 2010 11:54:24 PM] |
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Former Member
Cruncher Joined: May 22, 2018 Post Count: 0 Status: Offline |
I thought I was doing nicely with 6 Cores a box ![]() David, you are about to speed past me in MOT. That's doing nicely. ![]() Lawrence |
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David Autumns
Ace Cruncher UK Joined: Nov 16, 2004 Post Count: 11062 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
Cheers Lawrence.
----------------------------------------It's good to know us old timers are still in there crunching away. At kickoff I was running a 2100+ Socket A Athlon. A lot of water has gone under the bridge since then ! You take care Sir Dave ![]() |
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David Autumns
Ace Cruncher UK Joined: Nov 16, 2004 Post Count: 11062 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
It's had a 64 bit upgrade !
----------------------------------------http://www.theregister.co.uk/2011/02/28/seamicro_atom_server_64bit_upgrade/ It now uses 18% less power ![]() [Edit 1 times, last edit by David Autumns at Feb 28, 2011 7:36:33 AM] |
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sk..
Master Cruncher http://s17.rimg.info/ccb5d62bd3e856cc0d1df9b0ee2f7f6a.gif Joined: Mar 22, 2007 Post Count: 2324 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
http://regmedia.co.uk/2011/02/27/seamicro_n570_server_board.jpg
Both the old Z530 and N570 server boards plug into the chassis using absolutely standard PCI-Express 2.0 x16 slots, as you can see in the photos above. As if standard PCI-Express 2.0 x16 slots are commonly found in lengthwise pairs!Not sure why you would need two slots anyway; @ 8.5W TDP that board should be well under the 75W PCIE 2.0 standard. In fact if they doubled the core count a well designed card should still scrape under 75W. |
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David Autumns
Ace Cruncher UK Joined: Nov 16, 2004 Post Count: 11062 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
Hi skgiven
----------------------------------------they do alude to the fact that there's now plenty of spare real estate. I expect it's the interconnects that are now the issue. One to watch though as this stuff filters down to us mere mortals Dave ![]() |
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sk..
Master Cruncher http://s17.rimg.info/ccb5d62bd3e856cc0d1df9b0ee2f7f6a.gif Joined: Mar 22, 2007 Post Count: 2324 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
It will make for an intersting choice when they do; GPU or CPU PCIE card for an extra 32 threads. Good for here certainly and an intersting twist to the many-cpu platforms.
Plenty of boards have 3 or 4 slots, and a few have 7, so perhaps a compromise for a home version of a mini-super computer running OpenCL on Linux x64 server of some sort. |
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rilian
Veteran Cruncher Ukraine - we rule! Joined: Jun 17, 2007 Post Count: 1459 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
i'd call it sapphire mine
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Hypernova
Master Cruncher Audaces Fortuna Juvat ! Vaud - Switzerland Joined: Dec 16, 2008 Post Count: 1908 Status: Offline Project Badges: ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
Very interesting indeed. But major advances in parallel programming are still needed if we want to make the best possible use of thousands of cores and threads. We think linearly one thread at a time, even if our brain is massively parallel. The bottelneck here is really to design massively parallel applications, games, office applications etc. It will be the only way to well balance and use the full potential of hundreds or more cores. We are not there yet and I am not sure that the programming languages we use are well adapted. We probably need a new generation of tools and languages that makes parallelism an implicit fact. It has to be by definition and not as a result.
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